View LTC4098_3766923.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

LTC4098 1 4098f usb compatible switching power manager/li-ion charger with overvoltage protection the ltc ? 4098 is a high ef? ciency usb powerpath tm con- troller and full-featured li-ion/polymer battery charger. it seamlessly manages power distribution from multiple sources including usb, wall adapter, automotive, ? rewire or other high voltage dc/dc converters, and a li-ion/poly- mer battery. the LTC4098s internal switching regulator automatically limits its input current for usb compatibility. for auto- motive and other high voltage applications, the LTC4098 interfaces with a linear technology external switching regulator to provide a high ef? ciency high voltage power path. both the usb and the optional high voltage inputs feature bat-track optimized charging to provide maximum power to the application and ease thermal issues in high power density applications with input supplies from 5v to as high as 38v. an overvoltage circuit protects the LTC4098 from high voltage damage on the usb/wall adaptor inputs with an n-channel fet and a resistor. the LTC4098 is available in the ultra-thin (0.55mm) 20-lead 3mm 4mm qfn surface mount package. media players digital cameras gps pdas smart phones switching regulator with bat-track tm adaptive output control makes optimal use of limited power available from usb port to charge battery and power application overvoltage protection guards against damage bat-track external step-down switching regulator control maximizes ef? ciency from automotive, firewire and other high voltage sources 180m internal ideal diode plus external ideal diode controller seamlessly provide low loss powerpath when input power is limited or unavailable full featured li-ion/polymer battery charger instant-on operation with discharged battery 700ma maximum load current from usb port 1.5a maximum charge current with thermal limiting slew control reduces switching emi ultra-thin (0.55mm) 20-lead 3mm 4mm qfn high ef? ciency usb/automotive battery charger with overvoltage protection applicatio s u features descriptio u typical applicatio u , lt, ltc and ltm are registered trademarks of linear technology corporation. powerpath and bat-track are trademarks of linear technology corporation. all other trademarks are the property of their respective owners. v bus v c wall acpr automotive, firewire, etc. usb to m c system load 4098 ta01a clprog prog LTC4098 gnd sw batsens ovgate ovsens d0-d2 v out idgate bat li-ion + lt3480 3 usb switching regulator ef? ciency to system load (p vout /p vbus ) i vout (a) 0.01 0 efficiency (%) 20 40 60 80 0.1 1 4098 ta01b 100 10 30 50 70 90 bat = 4.2v bat = 3.3v v bus = 5v i bat = 0ma 10x mode
LTC4098 2 4098f v bus , wall (transient) t < 1ms, duty cycle < 1% .......................................... ?0.3v to 7v v bus , wall (static), bat, batsens, chrg c a cprg a prg a chrg a a a a a c r c c r c c a c a r cprg parar c p a p c p h p a a a a a c p h p a a a a a cprg r c cprg p c p h p aa aa aa aa aa crca characrc a a ra g pin configuration 20 19 18 17 7 8 top view 21 pdc package 20-lead (3mm s 4mm) plastic utqfn 9 10 6 5 4 3 2 1 11 12 13 14 15 16 ovsens ovgate clprog ntcbias ntc batsens d1 d0 sw v bus v out bat v c acpr wall d2 prog chrg gnd idgate t jmax = 125c, ja = 37c/w exposed pad (pin 21) is gnd, must be soldered to pcb order information lead free finish tape and reel part marking package description temperature range LTC4098epdc#pbf LTC4098epdc#trpbf ddvt 20-lead (3mm 4mm) plastic utqfn ?40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/
LTC4098 3 4098f symbol parameter conditions min typ max units i vout v out current available before discharging battery 1x mode, bat = 3.3v 5x mode, bat = 3.3v 10x mode, bat = 3.3v low power suspend mode high power suspend mode 0.26 1.6 135 659 1231 0.32 2.04 0.41 2.46 ma ma ma ma ma v clprog clprog servo voltage in current limit 1x, 5x, 10x modes suspend modes 1.188 100 v mv v uvlo v bus undervoltage lockout rising threshold falling threshold 3.95 4.30 4.00 4.35 v v v duvlo v bus to bat differential undervoltage lockout rising threshold falling threshold 200 50 mv mv v out v out voltage 1x, 5x, 10x modes, 0v < bat 4.2v, i vout = 0ma, battery charger off 3.5 bat + 0.3 4.7 v usb suspend modes, i vout = 250a 4.5 4.6 4.7 v f osc switching frequency 1.96 2.25 2.65 mhz r pmos pmos on resistance 0.18 r nmos nmos on resistance 0.30 i peak peak inductor current clamp 1x mode 5x mode 10x mode 1.2 1.7 3 a a a r susp suspend ldo output resistance 15 bat-track external switching regulator control v wall absolute wall input threshold rising threshold falling threshold 4.2 4.3 3.2 4.4 v v v wall differential wall input threshold rising threshold wall-bat falling threshold 0 90 30 45 mv mv regulation target 3.5 bat + 0.3 v wall quiescent current 100 a acpr high voltage i acpr = 0ma v out v acpr low voltage i acpr = 0ma 0 v overvoltage protection v ovp overvoltage protection threshold rising threshold, r ovsens = 6.04k 6.20 6.35 6.50 v v ovgate ovgate output voltage input below v ovp input above v ovp 1.88 ? v ovsense 0 12 v v t rise ovgate time to reach regulation c ovgate = 1nf 2.2 ms battery charger v float bat regulated output voltage 0c t a 85c 4.179 4.165 4.200 4.200 4.221 4.235 v v i chg constant-current mode charge current r prog = 1k r prog = 5k 980 192 1030 206 1080 220 ma ma i bat battery drain current v bus > v uvlo , powerpath switching regulator on, battery charger off, i vout = 0a 3.7 5 a v bus = 0v, i vout = 0a (ideal diode mode) 25 35 a the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v bus = 5v, bat = 3.8v, r clprog = 3.01k, unless otherwise noted. electrical characteristics
LTC4098 4 4098f symbol parameter conditions min typ max units v prog prog pin servo voltage 1.000 v v prog,trkl prog pin servo voltage in trickle charge bat < v trkl 0.100 v h prog ratio of i bat to prog pin current 1030 ma/ma v trkl trickle charge threshold voltage bat rising 2.7 2.85 3.0 v v trkl trickle charge hystersis voltage 130 mv v rechrg recharge battery threshold voltage threshold voltage relative to v float C80 C100 C120 mv t term safety timer termination period timer starts when bat = v float 3.4 4.0 4.6 hour t badbat bad battery termination time bat < v trkl 0.43 0.5 0.58 hour h c/10 end of charge indication current ratio (note 5) 0.09 0.1 0.11 ma/ma v chrg chrg pin output low voltage i chrg = 5ma 65 100 mv i chrg chrg pin input current bat = 4.5v, v chrg = 5v 0 1 a r on_chg battery charger power fet on-resistance (between v out and bat) i bat = 200ma 0.18 t lim junction temperature in constant temperature mode 110 c ntc v cold cold temperature fault threshold voltage rising threshold hysteresis 75.0 76.5 1.5 78.0 %ntcbias %ntcbias v hot hot temperature fault threshold voltage falling threshold hysteresis 33.4 34.9 1.5 36.4 %ntcbias %ntcbias v dis ntc disable threshold voltage falling threshold hysteresis 0.7 1.7 50 2.7 %ntcbias mv i ntc ntc leakage current ntc = 5v C50 50 na ideal diode v fwd forward voltage detection i vout = 10ma 15 mv r dropout internal diode on-resistance, dropout i vout = 200ma 0.18 i max diode current limit 2 a logic (d0, d1, d2) v il input low voltage 0.4 v v ih input high voltage 1.2 v i pd static pull-down current v pin = 1v 2 a the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v bus = 5v, bat = 3.8v, r clprog = 3.01k, unless otherwise noted. electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the LTC4098e is guaranteed to meet performance speci? cations from 0c to 85c. speci? cations over the C 40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: the LTC4098e includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may impair device reliability. note 4: total input current is the sum of quiescent current, i vbusq , and measured current given by v clprog /r clprog ? (h clprog + 1) note 5: h c/10 is expressed as a fraction of measured full charge current with a 5k prog resistor.
LTC4098 5 4098f powerpath switching regulator ef? ciency vs output current ideal diode v-i characteristics ideal diode resistance vs battery voltage output voltage vs output current usb compliant load current available before discharging battery battery drain current vs battery voltage typical perfor a ce characteristics uw t a = 25c unless otherwise noted. forward voltage (v) 0 current (a) 0.6 0.8 1.0 0.16 4098 g01 0.4 0.2 0 0.04 0.08 0.12 0.20 internal ideal diode with supplemental external vishay si2333 pmos internal ideal diode only v bus = 5v battery voltage (v) 2.7 resistance ( 7 ) 0.15 0.20 0.25 3.9 4098 g02 0.10 0.05 0 3.0 3.3 3.6 4.2 internal ideal diode with supplemental external vishay si2333 pmos internal ideal diode output current (ma) 0 output voltage (v) 4.00 4.25 4.50 800 4098 g03 3.75 3.50 3.25 200 400 600 1000 bat = 4v bat = 3.4v battery charger disabled v bus = 5v 5x mode battery voltage (v) 2.7 500 600 700 3.9 4098 g04 400 300 3.0 3.3 3.6 4.2 200 100 0 current (ma) v bus = 5v r clprog = 3.01k 5x usb setting battery voltage (v) 2.7 0 current (ma) 25 50 75 100 125 150 3.0 3.3 3.6 3.9 4098 g05 4.2 v bus = 5v r clprog = 3.01k 1x usb setting battery voltage (v) 2.7 0 battery current (a) 5 10 15 20 25 30 3.0 3.3 3.6 3.9 4098 g06 4.2 v bus = 0v v bus = 5v (suspend mode) i vout = 0 m a output current (a) 0.01 40 efficiency (%) 50 60 70 80 100 0.1 1 4098 g07 90 5x, 10x mode 1x mode bat = 3.8v usb compliant load current available before discharging battery battery voltage (v) 2.7 500 600 700 3.9 4098 g27 400 300 3.0 3.3 3.6 4.2 200 100 0 charge current (ma) v bus = 5v r prog = 1k r clprog = 3.01k 5x usb setting, battery charger set for 1a battery voltage (v) 2.7 0 charge current (ma) 25 50 75 100 125 150 3.0 3.3 3.6 3.9 4098 g28 4.2 v bus = 5v r prog = 1k r clprog = 3.01k 1x usb setting, battery charger set for 1a usb limited battery charge current vs battery voltage usb limited battery charge current vs battery voltage
LTC4098 6 4098f oscillator frequency vs temperature battery charge current vs temperature battery charger float voltage vs temperature low-battery (instant-on) output voltage vs temperature typical perfor a ce characteristics uw t a = 25c unless otherwise noted. output voltage vs output current in suspend v bus current vs output current in suspend automatic battery charge current reduction output current (ma) 0 output voltage (v) 4.0 4.5 5.0 2 4098 g10 3.5 3.0 2.5 0.5 1 1.5 2.5 suspend high suspend low v bus = 5v bat = 3.3v r clprog = 3.01k output current (ma) 0 v bus current (ma) 1.5 2.0 2.5 2 4098 g11 1.0 0.5 0 0.5 1 1.5 2.5 suspend high suspend low v bus = 5v bat = 3.3v r clprog = 3.01k temperature ( o c) C40 0 charge current (ma) 100 200 300 400 040 80 120 4098 g13 500 600 C20 20 60 100 thermal regulation r prog = 2k temperature ( o c) C40 float voltage (v) 4.200 4.210 60 4098 g14 4.190 4.180 C15 10 35 85 4.220 temperature ( o c) C40 output voltage (v) 3.64 3.66 60 4098 g15 3.62 3.60 C15 10 35 85 3.68 bat = 2.7v i vout = 100ma 5x mode temperature ( o c) C40 frequency (mhz) 2.250 2.300 2.350 60 4098 g16 2.200 2.150 2.100 C15 10 35 85 v out (v) 3.1 0 charge current (ma) 100 200 300 400 500 600 3.2 3.3 3.4 3.5 4098 g12 3.6 r prog = 2k battery charging ef? ciency vs battery voltage with no external load (p bat /p vbus ) v bus current vs v bus voltage (suspend) battery voltage (v) 2.7 efficiency (%) 80 90 3.9 4098 g08 70 60 3.0 3.3 3.6 4.2 100 r clprog = 3.01k r prog = 1k i vout = 0ma 1x charging efficiency 5x charging efficiency v bus voltage (v) 1 v bus current (a) 30 40 50 5 4098 g09 20 10 0 2 3 4 6 bat = 3.8v i vout = 0ma
LTC4098 7 4098f chrg pin voltage (v) 0 chrg pin current (ma) 60 80 100 4 4098 g19 40 20 0 1 2 3 5 v bus = 5v bat = 3.8v v bus quiescent current vs temperature quiescent current in suspend vs temperature temperature (c) C40 2 quiescent current (ma) 5 8 11 14 17 20 C15 C10 35 60 4098 g17 85 v bus = 5v i vout = 0a 5x mode 1x mode temperature ( o c) C40 27 quiescent current (a) 30 33 36 39 42 45 C15 10 35 60 4098 g18 85 v bus = 5v i vout = 0a ovp protection waveform typical perfor a ce characteristics uw t a = 25c unless otherwise noted. chrg pin current vs voltage (pull-down state) ovp connection waveform i out 500 m a/div 0ma 500 m s/div 4098 g20 v out 20mv/div ac coupled suspend ldo transient response (500a to 1.5ma) v bus 5v/div ovgate 5v/div 500s/div 4098 g21 ovp input voltage 0v to 5v step 5v/div v bus 5v/div ovgate 5v/div 500s/div 4098 g22 ovp input voltage 5v to 10v step 5v/div v bus 5v/div ovgate 5v/div 500s/div 4098 g23 ovp input voltage 10v to 5v step 5v/div ovp re-connection waveform
LTC4098 8 4098f typical perfor a ce characteristics uw t a = 25c unless otherwise noted. ovgate vs ovsens rising overvoltage threshold vs temperature temperature ( o c) C40 opv threshold (v) 6.270 6.275 6.280 60 4098 g25 6.265 6.260 6.255 C15 10 35 85 input voltage (v) 0 0 ovgate (v) 2 4 6 8 10 12 24 68 4098 g26 ovsens connected to input through 6.04k resistor ovsens quiescent current vs temperature temperature (c) C40 quiescent current (a) 33 35 37 60 4098 g24 31 29 27 C15 10 35 85 v ovsens = 5v
LTC4098 9 4098f pi fu ctio s uuu ovsens (pin 1): overvoltage protection sense input. ovsense should be connected through a 6.04k resistor to the input power connector and the drain of an external n-channel mos pass transistor. when the voltage on this pin exceeds a preset level, the ovgate pin will be pulled to gnd to disable the pass transistor and protect down- stream circuitry. if overvoltage protection is not desired, connect ovsens to gnd. ovgate (pin 2): overvoltage protection gate output. connect ovgate to the gate pin of an external n-channel mos pass transistor. the source of the transistor should be connected to v bus and the drain should be connected to the products dc input connector. this pin is con- nected to an internal charge pump capable of creating suf? cient overdrive to fully enhance the pass transistor. if an overvoltage condition is detected, ovgate is brought rapidly to gnd to prevent damage to downstream circuitry. ovgate works in conjunction with ovsens to provide this protection. if overvoltage protection is not desired, leave ovgate open. clprog (pin 3): usb current limit program and monitor pin. a 1% resistor from clprog to ground determines the upper limit of the current drawn from the v bus pin. a precise fraction of the input current, h clprog , is sent to the clprog pin when the high side switch is on. the switching regulator delivers power until the clprog pin reaches 1.188v. therefore, the current drawn from v bus will be limited to an amount given by h clprog and r clprog . there are several ratios for h clprog available, two of which correspond to the 500ma and 100ma usb speci? cations. a multilayer ceramic averaging capacitor is also required at clprog for ? ltering. ntcbias (pin 4): ntc thermistor bias output. if ntc operation is desired, connect a bias resistor between ntcbias and ntc, and an ntc thermistor between ntc and gnd. to disable ntc operation, connect ntc to gnd and leave ntcbias open. ntc (pin 5): input to the ntc thermistor monitoring circuits. the ntc pin connects to a negative temperature coef? cient thermistor which is typically co-packaged with the battery pack to determine if the battery is too hot or too cold to charge. if the batterys temperature is out of range, charging is paused until the battery temperature re-enters the valid range. a low drift bias resistor is required from ntcbias to ntc and a thermistor is required from ntc to ground. if the ntc function is not desired, the ntc pin should be grounded. batsens (pin 6): battery voltage sense input. for proper operation, this pin must always be connected to bat. for best operation, connect batsens to bat physically close to the li-ion cell. prog (pin 7): charge current program and charge cur- rent monitor pin. connecting a 1% resistor from prog to ground programs the charge current. if suf? cient input power is available in constant-current mode, this pin servos to 1v. the voltage on this pin always represents the actual charge current by using the following formula: i v r bat prog prog = ? 1030
LTC4098 10 4098f pi fu ctio s uuu chrg (pin 8): open-drain charge status output. the chrg pin indicates the status of the battery charger. four possible states are represented by chrg : charging, not charging, unresponsive battery and battery temperature out of range. chrg is modulated at 35khz and switches between a low and a high duty cycle for easy recognition by either humans or microprocessors. chrg requires a pull-up resistor and/or led to provide indication. gnd (pin 9, 21): exposed pad and pin must be soldered to the pcb to provide a low electrical and thermal imped- ance connection to ground. idgate (pin 10): ideal diode ampli? er output. this pin controls the gate of an external p-channel mosfet transis- tor used to supplement the internal ideal diode. the source of the p-channel mosfet should be connected to v out and the drain should be connected to bat. bat (pin 11): single cell li-ion battery pin. depending on available power and load, a li-ion battery on bat will either deliver system power to v out through the ideal diode or be charged from the battery charger. v out (pin 12): output voltage of the switching powerpath controller and input voltage of the battery charger. the majority of the portable product should be powered from v out . the LTC4098 will partition the available power be- tween the external load on v out and the internal battery charger. priority is given to the external load and any extra power is used to charge the battery. an ideal diode from bat to v out ensures that v out is powered even if the load exceeds the allotted power from v bus or if the v bus power source is removed. v out should be bypassed with a low impedance multilayer ceramic capacitor. v bus (pin 13): input voltage for the switching powerpath controller. v bus will usually be connected to the usb port of a computer or a dc output wall adapter. v bus should be bypassed with a low impedance multilayer ceramic capacitor. sw (pin 14): the sw pin delivers power from v bus to v out via the step-down switching regulator. an inductor should be connected from sw to v out . see the applica- tions information section for a discussion of inductance value and current rating. d0 (pin 15): mode select input pin. d0, in combination with the d1 pin and the d2 pin, controls the current limit and battery charger functions of the LTC4098 (see table 1). this pin is pulled low by a weak current sink. d1 (pin 16): mode select input pin. d1, in combination with the d0 pin and the d2 pin, controls the current limit and battery charger functions of the LTC4098 (see table 1). this pin is pulled low by a weak current sink. d2 (pin 17): mode select input pin. d2, in combination with the d0 pin and d1 pin, controls the current limit and battery charger functions of the LTC4098 (see table 1). this pin is pulled low by a weak current sink. wall (pin 18): external power source sense input. wall should be connected to the output of the external high voltage switching regulator and to the drain of an external p-channel mos transistor. it is used to determine when power is applied to the external regulator. when power is detected, acpr is driven low and the usb input is automatically disabled. acpr (pin 19): external power source present output (active low). acpr indicates that the output of the external high voltage step-down switching regulator is suitable for use by the LTC4098. it should be connected to the gate of an external p-channel mos transistor whose source is connected to v out and whose drain is connected to wall. acpr has a high level of v out and a low level of gnd. v c (pin 20): bat-track external switching regulator control output. this pin drives the v c pin of a linear technology external step-down switching regulator. in concert with wall and acpr , it will regulate v out to maximize battery charger ef? ciency.
LTC4098 11 4098f block diagra w 15 5 + C + C + C + C + C + C + C 0.1v undertemp average input current limit controller overtemp ntc ntcbias v out ntc t 3 clprog 13 v bus 2 ovgate 1 ovsens ntc fault d1 ntc enable 16 d2 17 d0 logic 1.188v + C + + C average output voltage limit controller osc pwm s pwm 4.6v s 2 100mv 6v overvoltage protection suspend ldo i ldo /m i switch /n to usb or wall adpapter to automotive, firewire, etc. q r 3.6v 0.3v 1v 100mv ntc 4098 bd i bat /1030 + C + C prog 7 gnd 21 8 11 bad cell chrg bat batsens single cell li-ion optional external ideal diode pmos 10 idgate 12 v out to system load acpr constant current constant voltage battery charger + C 0v 15mv ideal diode + C bat + 0.3v 3.6v v out 4.3v + + C + C 14 sw 19 wall nonoverlap and drive logic gnd 9 + 18 v c 20 sw fb v in v c lt3480 6 4 +C
LTC4098 12 4098f operatio u introduction the LTC4098 is a high ef? ciency power management and li-ion charger solution designed to make optimal use of the power available from a variety of sources, while mini- mizing power dissipation and easing thermal budgeting constraints. the innovative powerpath architecture ensures that the application is powered immediately after external voltage is applied, even with a completely dead battery by prioritizing power to the application over the battery. the LTC4098 includes a bat-track monolithic step-down switching regulator for usb, wall adapters, and other 5v sources. designed speci? cally for usb applications, the switching regulator incorporates a precision average in- put current limit for usb compatibility. because power is conserved, the LTC4098 allows the load current on v out to exceed the current drawn by the usb port, making maximum use of the allowable usb power for battery charging. the switching regulator and battery charger communicate to ensure that the average input current never exceeds the usb speci? cations. for automotive, ? rewire, and other high voltage applica- tions, the LTC4098 provides bat-track control of an external ltc step-down switching regulator to maximize battery charger ef? ciency and minimize heat production. when power is available from both the usb and high voltage inputs, the high voltage input is prioritized and the usb input is automatically disabled. the LTC4098 features an overvoltage protection circuit which is designed to work with an external n-channel fet to prevent damage to its inputs caused by accidental application of high voltage. the LTC4098 contains both an internal 180m ideal diode and an ideal diode controller designed for use with an external p-channel fet. the ideal diodes from bat to v out guarantee that ample power is always available to v out even if there is insuf? cient or absent power at v bus or wall. finally, to prevent battery drain when a device is connected to a suspended usb port, an ldo from v bus to v out provides either low power or high power usb suspend current to the application. bat-track input current limited step down switching regulator the power delivered from v bus to v out is controlled by a 2.25mhz constant frequency step-down switching regulator. to meet the usb maximum load speci? cation, the switching regulator contains a measurement and control system that ensures that the average input cur- rent remains below the level programmed at clprog. v out drives the combination of the external load and the battery charger. if the combined load does not cause the switching power supply to reach the programmed input current limit, v out will track approximately 0.3v above the battery voltage. by keeping the voltage across the battery charger at this low level, power lost to the battery charger is minimized. figure 1 shows the power path components. if the combined external load plus battery charge current is large enough to cause the switching power supply to reach the programmed input current limit, the battery charger will reduce its charge current by precisely the amount necessary to enable the external load to be satis? ed. even if the battery charge current is programmed to exceed the allowable usb current, the usb speci? cation for average input current will not be violated; the battery charger will reduce its current as needed. furthermore, if the load cur- rent at v out exceeds the programmed power from v bus , load current will be drawn from the battery via the ideal diodes even when the battery charger is enabled. the current at clprog is a precise fraction of the v bus current. when a programming resistor and an averaging capacitor are connected from clprog to gnd, the voltage on clprog represents the average input current of the switching regulator. as the input current approaches the programmed limit, clprog reaches 1.188v and power delivered by the switching regulator is held constant. several ratios of current are available which can be set to correspond to usb low and high power modes with a single programming resistor. the input current limit is programmed by various com- binations of the d0, d1 and d2 pins as shown in table 1. the switching input regulator can also be deactivated (usb suspend).
LTC4098 13 4098f + C + + C 0.3v 1.188v 3.6v clprog i switch /n + C + C 15mv omv ideal diode pwm and gate drive average input current limit controller average output voltage limit controller constant current constant voltage battery charger + C 3 idgate 10 v out 12 sw 3.5v to (bat + 0.3v) to system load optional external ideal diode pmos single cell li-ion 4098 f01 14 bat 11 batsens from usb or wall adapter 13 + 2 ovgate v bus ovsens to automotive, firewire, etc. acpr bat + 0.3v 3.6v v out 4.3v + + C + C 19 wall bat-track hv control 18 v c 20 sw fb v in v c high voltage step-down switching regulator 6 s 2 6v overvoltage protection + C +C 1 operatio u figure 1.
LTC4098 14 4098f the average input current will be limited by the clprog pro- gramming resistor according to the following expression: ii v r h vbus vbusq clprog clprog clprog =+ + () ?1 where i vbusq is the quiescent current of the LTC4098, v clprog is the clprog servo voltage in current limit, r clprog is the value of the programming resistor and h clprog is the ratio of the measured current at v bus to the sample current delivered to clprog. refer to the electrical characteristics table for values of h clprog , v clprog and i vbusq . given worst-case circuit tolerances, the usb speci? cation for the average input current in 1x or 5x mode will not be violated, provided that r clprog is 3.01k or greater. table 1 shows the available settings for the d0, d1 and d2 pins. table 1. controlled input current limit d2 d1 d0 charger status i bus(lim) 0 0 0 on 100ma (1x) 0 0 1 on 1a (10x) 0 1 0 on 500ma (5x) 0 1 1 off 500a (susp low) 1 0 0 off 100ma (1x) 1 0 1 off 1a (10x) 1 1 0 off 500ma (5x) 1 1 1 off 2.5ma (susp high) notice that when d0 is high and d1 is low, the switching regulator is set to a higher current limit for increased charging and power availability at v out . these modes will typically be used when there is line power available from a wall adapter. operatio u bat (v) 2.4 4.5 4.2 3.9 3.6 3.3 3.0 2.7 2.4 3.3 3.9 4098 f02 2.7 3.0 3.6 4.2 v out (v) no load 300mv figure 2. v out vs bat while not in current limit, the switching regulators bat-track feature will set v out to approximately 300mv above the voltage at bat. however, if the voltage at bat is below 3.3v, and the load requirement does not cause the switching regulator to exceed its current limit, v out will regulate at a ? xed 3.6v as shown in figure 2. this instant-on operation will allow a portable product to run immediately when power is applied without waiting for the battery to charge. if the load does exceed the current limit at v bus , v out will range between the no-load voltage and slighly below the battery voltage, indicated by the shaded region of figure 2.
LTC4098 15 4098f operatio u for very low-battery voltages, the battery charger acts like a load and, due to limited input power, its current will tend to pull v out below the 3.6v instant-on voltage. to prevent v out from falling below this level, an undervoltage circuit automatically detects that v out is falling and reduces the battery charge current as needed. this reduction ensures that load current and voltage are always prioritized while allowing as much battery charge current as possible. (see over programming the battery charger in the applications information section.) the voltage regulation loop compensation is controlled by the capacitance on v out . an mlcc capacitor of 10f is required for loop stability. additional capacitance beyond this value will improve transient response. an internal undervoltage lockout circuit monitors v bus and keeps the switching regulator off until v bus rises above the rising uvlo threshold (4.3v). if v bus falls below the falling uvlo threshold (4v), system power at v out will be drawn from the battery via the ideal diodes. the volt- age at v bus must also be higher than the voltage at bat by approximately 170mv for the switching regulator to operate. bat-track high voltage external switching regulator control the wall, acpr and v c pins can be used in conjunction with an external high voltage step-down switching regula- tor such as the lt3480 to minimize heat production when operating from higher voltage sources, as shown in the block diagram. bat-track control circuitry regulates the external switching regulators output voltage to the larger of bat + 300mv or 3.6v. this maximizes battery charger ef? ciency while still allowing instant-on operation when the battery is deeply discharged. the feedback network of the high voltage regulator should be set to generate an output voltage between 4.5v and 5.5v. when high voltage is applied to the external regulator, wall will rise toward this programmed output voltage. when wall exceeds approximately 4.3v, acpr is brought low and the bat-track control of the LTC4098 overdrives the local v c control of the external high voltage step-down switching regulator. therefore, once the bat-track control is enabled, the output voltage is set independent of the switching regulator feedback network. bat-track control provides a signi? cant ef? ciency advan- tage over the simple use of a 5v switching regulator output to drive the battery charger. with a 5v output driving v out , battery charger ef? ciency is approximately: ? total buck bat v v = ? 5 where buck is the ef? ciency of the high voltage switching regulator and 5v is the output voltage of the switching regulator. with a typical switching regulator ef? ciency of 87% and a typical battery voltage of 3.8v, the total bat- tery charger ef? ciency is approximately 66%. assuming a 1a charge current 1.7w of power is dissipated just to charge the battery!
LTC4098 16 4098f with bat-track, battery charger ef? ciency is approxi- mately: ? total buck bat bat v = + ? . 03 with the same assumptions as above, the total battery charger ef? ciency is approximately 81%. this example works out to less than 1w of power dissipation, or almost 60% less heat. see the typical applications section for complete circuits using the lt3480 with bat-track control. overvoltage protection the LTC4098 can protect itself from the inadvertent ap- plication of excessive voltage to v bus or wall with just two external components: an n-channel fet and a 6.04k resistor. the maximum safe overvoltage magnitude will be determined by the choice of the external nmos and its associated drain breakdown voltage. the overvoltage protection module consists of two pins. the ? rst, ovsens, is used to measure the externally ap- plied voltage through an external resistor. the second, ovgate, is an output used to drive the gate pin of an external fet. the voltage at ovsens will be lower than the ovp input voltage by (i ovsens ? 6.04k) due to the ovp circuits quiescent current. the ovp input will be 200mv to 400mv higher than ovsens under normal operating conditions. when ovsens is below 6v, an internal charge pump will drive ovgate to approximately 1.88 ? ovsens. this will enhance the n channel fet and provide a low impedance connection to v bus or wall which will, in turn, power the LTC4098. if ovsens should rise above 6v (6.35v ovp input) due to a fault or use of an incorrect wall adapter, ovgate will be pulled to gnd, disabling the external fet to protect downstream circuitry. operatio u when the voltage drops below 6v again, the external fet will be reenabled. in an overvoltage condition, the ovsens pin will be clamped at 6v. the external 6.04k resistor must be sized appropriately to dissipate the resultant power. for example, a 1/10w 6.04k resistor can have at most p max ? 6.04k = 24v applied across its terminals. with the 6v at ovsens, the maximum overvoltage magnitude that this resistor can withstand is 30v. a 1/4w 6.04k resistor raises this value to 44v. walls absolute maximum current rating of 10ma imposes an upper limit of 66v protection. the charge pump output on ovgate has limited output drive capability. care must be taken to avoid leakage on this pin, as it may adversely affect operation. see the applications information section for examples of multiple input protection, reverse input protection, and a table of recommended components. ideal diode from bat to v out the LTC4098 has an internal ideal diode as well as a con- troller for an external ideal diode. both the internal and the external ideal diodes are always on and will respond quickly whenever v out drops below bat. if the load current increases beyond the power allowed from the switching regulator, additional power will be pulled from the battery via the ideal diodes. furthermore, if power to v bus (usb or wall power) is removed, then all of the application power will be provided by the bat- tery via the ideal diodes. the ideal diodes will be fast enough to keep v out from drooping with only the stor- age capacitance required for the switching regulator. the internal ideal diode consists of a precision ampli? er that activates a large on-chip mosfet transistor whenever the voltage at v out is approximately 15mv (v fwd ) below
LTC4098 17 4098f the voltage at bat. within the ampli? ers linear range, the small-signal resistance of the ideal diode will be quite low, keeping the forward drop near 15mv. at higher current levels, the mosfet will be in full conduction. if additional conductance is needed, an external p-channel mosfet transistor may be added from bat to v out . the idgate pin of the LTC4098 drives the gate of the external p-chan- nel mosfet transistor for automatic ideal diode control. the source of the external p-channel mosfet should be connected to v out and the drain should be connected to bat. capable of driving a 1nf load, the idgate pin can control an external p-channel mosfet transistor having an on-resistance of 30m or lower. suspend ldo the LTC4098 provides a small amount of power to v out in suspend mode by including an ldo from v bus to v out . this ldo will prevent the battery from running down when the portable product has access to a suspended usb port. regulating at 4.6v, this ldo only becomes active when the switching converter is disabled. to remain compliant with the usb speci? cation, the input to the ldo is current limited so that it will not exceed the low power or high power suspend speci? cation. if the load on v out exceeds the suspend current limit, the additional current will come from the battery via the ideal diodes. the suspend ldo sends a scaled copy of the v bus current to the clprog pin, which will servo to approximately 100mv in this mode. thus, the high power and low power suspend settings are related to the levels programmed by the same resistor for 1x and 5x modes. battery charger the LTC4098 includes a constant-current/constant-volt- age battery charger with automatic recharge, automatic termination by safety timer, low voltage trickle charging, bad cell detection and thermistor sensor input for out-of- temperature charge pausing. when a battery charge cycle begins, the battery charger ? rst determines if the battery is deeply discharged. if the battery voltage is below v trkl , typically 2.85v, an automatic trickle charge feature sets the battery charge current to 10% of the programmed value. if the low voltage persists for more than 1/2 hour, the battery charger automatically terminates and indicates, via the chrg pin, that the bat- tery was unresponsive. once the battery voltage is above v trkl , the charger begins charging in full power constant-current mode. the current delivered to the battery will try to reach 1030v/r prog . depending on available input power and external load conditions, the battery charger may or may not be able to charge at the full programmed rate. the external load will always be prioritized over the battery charge current. the usb current limit programming will always be observed and only additional power will be available to charge the battery. when system loads are light, battery charge cur- rent will be maximized. operatio u forward voltage (mv) (bat C v out ) 0 current (ma) 600 1800 2000 2200 120 240 300 4098 f03 200 1400 1000 400 1600 0 1200 800 60 180 360 480 420 vishay si2333 external ideal diode LTC4098 ideal diode on semiconductor mbrm120lt3 figure 3. ideal diode v-i characteristics
LTC4098 18 4098f charge termination the battery charger has a built-in safety timer. once the voltage on the battery reaches the pre-programmed ? oat voltage of 4.200v, the charger will regulate the battery voltage there and the charge current will decrease naturally. once the charger detects that the battery has reached 4.200v, the 4-hour safety timer is started. after the safety timer expires, charging of the battery will discontinue and no more current will be delivered. automatic recharge once the battery charger terminates, it will remain off drawing only microamperes of current from the battery. if the portable product remains in this state long enough, the battery will eventually self discharge. to ensure that the battery is always topped off, a charge cycle will au- tomatically begin when the battery voltage falls below v rechrg (typically 4.1v). in the event that the safety timer is running when the battery voltage falls below v rechrg , it will reset back to zero. to prevent brief excursions below v rechrg from resetting the safety timer, the battery voltage must be below v rechrg for more than 1.5ms. the charge cycle and safety timer will also restart if the v bus uvlo cycles low and then high (e.g., v bus is removed and then replaced) or if the charger is momentarily disabled using the d2 pin. charge current the charge current is programmed using a single resistor from prog to ground. 1/1030th of the battery charge cur- rent is delivered to prog, which will attempt to servo to 1.000v. thus, the battery charge current will try to reach 1030 times the current in the prog pin. the program resistor and the charge current are calculated using the following equations: r v i i v r prog chg chg prog == 1030 1030 , in either the constant-current or constant-voltage charging modes, the voltage at the prog pin will be proportional to the actual charge current delivered to the battery. the charge current can be determined at any time by monitoring the prog pin voltage and using the following equation: i v r bat prog prog = ? 1030 in many cases, the actual battery charge current, i bat , will be lower than the programmed current, i chg , due to limited input power available and prioritization to the system load drawn from v out . charge status indication the chrg pin indicates the status of the battery charger. four possible states are represented by chrg which include charging, not charging (or ? oat charge current less than programmed end of charge indication current), unrespon- sive battery and battery temperature out of range. the signal at the chrg pin can be easily recognized as one of the above four states by either a human or a mi- croprocessor. an open-drain output, the chrg pin can drive an indicator led through a current limiting resistor for human interfacing or simply a pull-up resistor for microprocessor interfacing. operatio u
LTC4098 19 4098f to make the chrg pin easily recognized by both humans and microprocessors, the pin is either a dc signal of on for charging, off for not charging or it is switched at high frequency (35khz) to indicate the two possible faults. while switching at 35khz, its duty cycle is modulated at a slow rate that can be recognized by a human. when charging begins, chrg is pulled low and remains low for the duration of a normal charge cycle. when charge current drops to 1/10th the value programmed by r prog , the chrg pin is released (hi-z). the chrg pin does not respond to the c/10 threshold if the LTC4098 is in v bus current limit. this prevents false end-of-charge indications due to insuf? cient power available to the battery charger. if a fault occurs while charging, the pin is switched at 35khz. while switching, its duty cycle is modulated between a high and low value at a very low frequency. the low and high duty cycles are disparate enough to make an led appear to be on or off thus giving the appearance of blinking. each of the two faults has its own unique blink rate for human recognition as well as two unique duty cycles for machine recognition. table 2 illustrates the four possible states of the chrg pin when the battery charger is active. table 2. chrg signal status frequency modulation (blink) frequency duty cycles charging 0hz 0hz (low z) 100% i bat < c/10 0hz 0hz (hi-z) 0% ntc fault 35khz 1.5hz at 50% 6.25% or 93.75% bad battery 35khz 6.1hz at 50% 12.5% or 87.5% notice that an ntc fault is represented by a 35khz pulse train whose duty cycle toggles between 6.25% and 93.75% at a 1.5hz rate. a human will easily recognize the 1.5hz rate as a slow blinking which indicates the out of range battery temperature while a microprocessor will be able to decode either the 6.25% or 93.75% duty cycles as an ntc fault. if a battery is found to be unresponsive to charging (i.e., its voltage remains below 2.85v for 1/2 hour), the chrg pin gives the battery fault indication. for this fault, a human would easily recognize the frantic 6.1hz fast blink of the led while a microprocessor would be able to decode either the 12.5% or 87.5% duty cycles as a bad cell fault. because the LTC4098 is a 3-terminal powerpath product, system load is always prioritized over battery charging. due to excessive system load, there may not be suf? cient power to charge the battery beyond the bad-cell threshold voltage within the bad-cell timeout period. in this case the battery charger will falsely indicate a bad cell. system software may then reduce the load and reset the battery charger to try again. although very improbable, it is possible that a duty cycle reading could be taken at the bright-dim transition (low duty cycle to high duty cycle). when this happens the duty cycle reading will be precisely 50%. if the duty cycle reading is 50%, system software should disqualify it and take a new duty cycle reading. operatio u
LTC4098 20 4098f ntc thermistor the battery temperature is measured by placing a nega- tive temperature coef? cient (ntc) thermistor close to the battery pack. the ntc circuitry is shown in the block diagram. to use this feature, connect the ntc thermistor, r ntc , between the ntc pin and ground and a bias resistor, r nom , from ntcbias to ntc. r nom should be a 1% resistor with a value equal to the value of the chosen ntc thermistor at 25c (r25). the LTC4098 will pause charging when the resistance of the ntc thermistor drops to 0.54 times the value of r25 or approximately 54k (for a vishay curve 1 thermistor, this corresponds to approximately 40c). if the battery charger is in constant voltage (? oat) mode, the safety timer also pauses until the thermistor indicates a return to a valid temperature. as the temperature drops, the resistance of the ntc thermistor rises. the LTC4098 is also designed to pause charging when the value of the ntc thermistor increases to 3.25 times the value of r25. for a vishay curve 1 thermistor, this resistance, 325k, corresponds to approximately 0c. the hot and cold comparators each have approximately 3c of hysteresis to prevent oscillation about the trip point. grounding the ntc pin disables all ntc functionality. figure 4 is a ? ow chart representation of the battery charger algorithm employed by the LTC4098. thermal regulation to prevent thermal damage to the LTC4098 or surround- ing components, an internal thermal feedback loop will automatically decrease the programmed charge current if the die temperature rises to approximately 110c. thermal regulation protects the LTC4098 from excessive temperature due to high power operation or high ambient thermal conditions, and allows the user to push the limits of the power handling capability with a given circuit board design without risk of damaging the LTC4098 or external components. the bene? t of the LTC4098 thermal regulation loop is that charge current can be set according to actual conditions rather than worst-case conditions for a given application with the assurance that the charger will auto- matically reduce the current in worst-case conditions. shutdown mode the usb switching regulator is enabled whenever v bus is above the uvlo voltage and the LTC4098 is not in one of the two usb suspend modes (500a or 2.5ma). when power is available from both the usb and high voltage inputs, the high voltage regulator is prioritized and the usb switching regulator is disabled. the ideal diode is enabled at all times and cannot be disabled. operatio u
LTC4098 21 4098f operatio u clear event timer ntc out of range chrg currently high-z indicate ntc fault at chrg battery state charge at 1030v/r prog rate pause event timer pause event timer attempt to charge with fixed voltage (4.200v) run event timer charge at 100v/r prog (c/10 rate) run event timer assert chrg low power on timer > 30 minutes timer > 4 hours bat > 2.85v bat < 4.1v i bat < c/10 no no yes yes yes yes yes yes no no bat > 4.15v bat < 2.85v 2.85v < bat < 4.15v no no no no stop charging stop charging indicate battery fault at chrg bat rising through 4.1v bat falling through 4.1v release chrg high-z release chrg high-z 4098 f04 no yes yes yes figure 4
LTC4098 22 4098f applicatio s i for atio wu u u clprog resistor and capacitor as described in the bat-track input current limited step down switching regulator section, the resistor on the clprog pin determines the average input current limit in each of the six current limit modes. the input current will be comprised of two components, the current that is used to drive v out and the quiescent current of the switching regulator. to ensure that the usb speci? cation is strictly met, both components of input current should be considered. the electrical characteristics table gives the typical values for quiescent currents in all settings as well as current limit programming accuracy. to get as close to the 500ma or 100ma speci? cations as possible, a precision resistor should be used. an averaging capacitor is required in parallel with the resistor so that the switching regulator can determine the average input current. this capacitor also provides the dominant pole for the feedback loop when current limit is reached. to ensure stability, the capacitor on clprog should be 0.1f or larger. choosing the inductor because the input voltage range and output voltage range of the power path switching regulator are both fairly nar- row, the ltc4099 was designed for a speci? c inductance value of 3.3h. some inductors which may be suitable for this application are listed in table 3. v bus and v out bypass capacitors the style and value of capacitors used with the LTC4098 determine several important parameters such as regula- tor control-loop stability and input voltage ripple. because the LTC4098 uses a step-down switching power supply from v bus to v out , its input current waveform contains high frequency components. it is strongly recommended that a low equivalent series resistance (esr) multilayer ceramic capacitor be used to bypass v bus . tantalum and aluminum capacitors are not recommended because of their high esr. the value of the capacitor on v bus directly controls the amount of input ripple for a given load current. increasing the size of this capacitor will reduce the input ripple. the usb speci? cation allows a maximum of 10f to be connected directly across the usb power bus. if additional capacitance is required for noise performance, it may be connected directly to the v bus pin when using the ovp feature of the LTC4098. this extra capacitance will be soft-connected over several milliseconds to limit inrush current and avoid excessive transient voltage drops on the bus. to prevent large v out voltage steps during transient load conditions, it is also recommended that a ceramic capacitor be used to bypass v out . the output capacitor is used in the compensation of the switching regulator. at least 10f with low esr are required on v out . additional capacitance will improve load transient performance and stability. table 3. recommended inductors for the LTC4098 inductor type l (h) max i dc (a) max dcr ( ) size in mm (l w h) manufacturer lps4018 3.3 2.2 0.08 3.9 3.9 1.7 coilcraft www.coilcraft.com d53lc db318c 3.3 3.3 2.26 1.55 0.034 0.070 5 5 3 3.8 3.8 1.8 toko www.toko.com we-tpc type m1 3.3 1.95 0.065 4.8 4.8 1.8 wurth elektronik www.we-online.com cdrh6d12 cdrh6d38 3.3 3.3 2.2 3.5 0.0625 0.020 6.7 6.7 1.5 7 7 4 sumida www.sumida.com
LTC4098 23 4098f applicatio s i for atio wu u u multilayer ceramic chip capacitors typically have excep- tional esr performance. mlccs combined with a tight board layout and an unbroken ground plane will yield very good performance and low emi emissions. there are several types of ceramic capacitors avail- able each having considerably different characteristics. for example, x7r ceramic capacitors have the best voltage and temperature stability. x5r ceramic capacitors have apparently higher packing density but poorer performance over their rated voltage and temperature ranges. y5v ceramic capacitors have the highest packing density, but must be used with caution, because of their extreme nonlinear characteristic of capacitance versus voltage. the actual in-circuit capacitance of a ceramic capacitor should be measured with a small ac signal and dc bias as is expected in-circuit. many vendors specify the capacitance versus voltage with a 1v rms ac test signal and, as a result, over state the capacitance that the capacitor will present in the application. using similar operating conditions as the application, the user must measure or request from the vendor the actual capacitance to determine if the selected capacitor meets the minimum capacitance that the application requires. overprogramming the battery charger the usb high power speci? cation allows for up to 2.5w to be drawn from the usb port. the switching regulator transforms the voltage at v bus to just above the voltage at bat with high ef? ciency, while limiting power to less than the amount programmed at clprog. the charger should be programmed (with the prog pin) to deliver the maximum safe charging current without regard to the usb speci? cations. if there is insuf? cient current available to charge the battery at the programmed rate, it will reduce charge current until the system load on v out is satis? ed and the v bus current limit is satis? ed. programming the charger for more current than is available will not cause the average input current limit to be violated. it will merely allow the battery charger to make use of all available power to charge the battery as quickly as possible, and with minimal power dissipation within the charger. overvoltage protection it is possible to protect both v bus and wall from overvoltage damage with several additional components, as shown in figure 5. schottky diodes d1 and d2 pass r1 c1 d1 v1 v2 d2 mn1 mn2 4098 f05 wall ovsens ovgate LTC4098 v bus figure 5. dual input overvoltage protection
LTC4098 24 4098f applicatio s i for atio wu u u the larger of v1 and v2 to r1 and ovsens. if either v1 or v2 exceeds 6v plus v f (schottky), ovgate will be pulled to gnd and both the wall and usb inputs will be protected. each input is protected up to the drain- source breakdown, bvdss, of mn1 and mn2. r1 must also be rated for the power dissipated during maximum overvoltage. see the operations section for an explanation of this calculation.table 4 shows some nmos fets that maybe suitable for overvoltage protection. alternate ntc thermistors and biasing the LTC4098 provides temperature quali? ed charging if a grounded thermistor and a bias resistor are connected to ntc and ntcbias. by using a bias resistor whose value is equal to the room temperature resistance of the thermistor (r25) the upper and lower temperatures are pre-programmed to approximately 40c and 0c, respec- tively (assuming a vishay curve 1 thermistor). the upper and lower temperature thresholds can be ad- justed by either a modi? cation of the bias resistor value or by adding a second adjustment resistor to the circuit. if only the bias resistor is adjusted, then either the upper or the lower threshold can be modi? ed but not both. the other trip point will be determined by the characteristics of the thermistor. using the bias resistor in addition to an r2 r1 usb/wall adapter 4098 f06 c1 d1 mn1 mp1 v bus positive protection up to bvdss of mn1 v bus negative protection up to bvdss of mp1 v bus ovsens ovgate LTC4098 figure 6. dual-polarity voltage protection table 4. recommended ovp fets nmos fet bvdss r on package si1472dh 30v 82m sc70-6 si2302ads 20v 60m sot-23 si2306bds 30v 65m sot-23 si2316bds 30v 80m sot-23 irlml2502 20v 35m sot-23 reverse voltage protection the LTC4098 can also be easily protected against the application of reverse voltage as shown in figure 6. d1 and r1 are necessary to limit the maximum vgs seen by mp1 during positive overvoltage events. d1s breakdown voltage must be safely below mp1s bvgs. the circuit shown in figure 6 offers forward voltage protection up to mn1s bvdss and reverse voltage protection up to mp1s bvdss.
LTC4098 25 4098f r cold = ratio of r ntc|cold to r25 r hot = ratio of r ntc|cold to r25 r nom = primary thermistor bias resistor (see figure 7a) r1 = optional temperature range adjustment resistor (see figure 7b) the trip points for the LTC4098s temperature quali? cation are internally programmed at 0.349 ? ntcbias for the hot threshold and 0.765 ? ntcbias for the cold threshold. therefore, the hot trip point is set when: r rr ntcbias ntcbias ntc hot nom ntc hot | | ?.? + = 0 349 and the cold trip point is set when: r rr ntcbias ntcbi ntc cold nom ntc cold | | ?.? + = 0 765 a as applicatio s i for atio wu u u adjustment resistor, both the upper and the lower tempera- ture trip points can be independently programmed with the constraint that the difference between the upper and lower temperature thresholds cannot decrease. examples of each technique are given below. ntc thermistors have temperature characteristics which are indicated on resistance-temperature conversion tables. the vishay-dale thermistor nths0603n011-n1003f, used in the following examples, has a nominal value of 100k and follows the vishay curve 1 resistance-temperature characteristic. in the explanation below, the following notation is used. r25 = value of the thermistor at 25c r ntc|cold = value of thermistor at the cold trip point r ntc|hot = value of the thermistor at the hot trip point C + C + r nom 100k r ntc 100k ntc 0.1v ntc_enable 4098 f07a LTC4098 ntc block too_cold too_hot 0.765 ? ntcbias 0.349 ? ntcbias C + 5 ntcbias 4 t C + C + r nom 105k r ntc 100k r1 12.7k ntc 0.1v ntc_enable 40881 f07b too_cold too_hot 0.765 ? ntcbias 0.349 ? ntcbias C + 5 LTC4098 ntc block t ntcbias 4 (7a) (7b) figure 7. ntc circuits
LTC4098 26 4098f solving these equations for r ntc|cold and r ntc|hot results in the following: r ntc|hot = 0.536 ? r nom and r ntc|cold = 3.25 ? r nom by setting r nom equal to r25, the above equations result in r hot = 0.536 and r cold = 3.25. referencing these ratios to the vishay resistance-temperature curve 1 chart gives a hot trip point of about 40c and a cold trip point of about 0c. the difference between the hot and cold trip points is approximately 40c. by using a bias resistor, r nom , different in value from r25, the hot and cold trip points can be moved in either direc- tion. the temperature span will change somewhat due to the non-linear behavior of the thermistor. the following equations can be used to easily calculate a new value for the bias resistor: r r r r r r nom hot nom cold = = 0 536 25 325 25 . ? . ? where r hot and r cold are the resistance ratios at the desired hot and cold trip points. note that these equations are linked. therefore, only one of the two trip points can be chosen, the other is determined by the default ratios designed in the ic. consider an example where a 60c hot trip point is desired. from the vishay curve 1 r-t characteristics, r hot is 0.2488 at 60c. using the above equation, r nom should be set to 46.4k. with this value of r nom , the cold trip point is about 16c. notice that the span is now 44c rather than the previous 40c. this is due to the decrease in tem- perature gain of the thermistor as absolute temperature increases. the upper and lower temperature trip points can be inde- pendently programmed by using an additional bias resistor as shown in figure 7b. the following formulas can be used to compute the values of r nom and r1: r rr r rrr nom cold hot nom hot = = C . ? .? C ? 2 714 25 1 0 536 r r25 for example, to set the trip points to 0c and 45c with a vishay curve 1 thermistor choose: rkk nom == 3 266 0 4368 2 714 100 104 2 .C. . ?. the nearest 1% value is 105k: r1 = 0.536 ? 105k C 0.4368 ? 100k = 12.6k the nearest 1% value is 12.7k. the ? nal circuit is shown in figure 7b and results in an upper trip point of 45c and a lower trip point of 0c. applicatio s i for atio wu u u
LTC4098 27 4098f usb inrush limiting the usb speci? cation allows at most 10f of downstream capacitance to be hot-plugged into a usb hub. in most LTC4098 applications, 10f should be enough to provide adequate ? ltering on v bus . if more capacitance is required, the ovp circuit will provide adequate soft-connect time to prevent excessive inrush currents. voltage overshoot on v bus may sometimes be observed when connecting the LTC4098 to a lab power supply. this overshoot is caused by long leads from the power supply to v bus . twisting the wires together from the supply to v bus can greatly reduce the parasitic inductance of these long leads, and keep the voltage at v bus to safe levels. usb cables are generally manufactured with the power leads in close proximity, and thus fairly low parasitic inductance. board layout considerations the exposed pad on the backside of the LTC4098 package must be securely soldered to the pc board ground. this is the primary ground pin in the package, and it serves as the return path for both the control circuitry and the synchronous recti? er. furthermore, due to its high frequency switching circuitry, it is imperative that the input capacitor, inductor, and output capacitor be as close to the LTC4098 as possible and that there be an unbroken ground plane under the LTC4098 and all of its external high frequency components. high frequency currents, such as the input current on the LTC4098, tend to ? nd their way on the ground plane along a mirror path directly beneath the incident path on the top of the board. if there are slits or cuts in the ground plane due to other traces on that layer, the current will be forced to go around the slits. if high frequency currents are not allowed to ? ow back through their natural least-area path, excessive voltage will build up and radiated emissions will occur (see figure 8). there should be a group of vias directly under the grounded backside leading directly down to an internal ground plane. to minimize parasitic inductance, the ground plane should be as close as possible to the top plane of the pc board (layer 2). the idgate pin for the external ideal diode controller has extremely limited drive current. care must be taken to minimize leakage to adjacent pc board traces. 100na of leakage from this pin will introduce an additional offset to the ideal diode of approximately 10mv. to minimize leakage, the trace can be guarded on the pc board by surrounding it with v out connected metal, which should generally be less than one volt higher than idgate. applicatio s i for atio wu u u figure 8. ground currents follow their incident path at high speed. slices in the ground plane cause high voltage and increased emissions 4098 f08
LTC4098 28 4098f battery charger stability considerations the LTC4098s battery charger contains both a con- stant-voltage and a constant-current control loop. the constant-voltage loop is stable without any compensation when a battery is connected with low impedance leads. excessive lead length, however, may add enough series inductance to require a bypass capacitor of at least 1f from bat to gnd. high value, low esr multilayer ceramic chip capacitors reduce the constant-voltage loop phase margin, possibly resulting in instability. ceramic capacitors up to 22f may be used in parallel with a battery, but larger ceramics should be decoupled with 0.2 to 1 of series resistance. furthermore, a 100f mlcc in series with a 0.3 resistor or a 100f os-con capacitor from bat to gnd is required to prevent oscillation when the battery is disconnected. in constant-current mode, the prog pin is in the feed- back loop rather than the battery voltage. because of the additional pole created by any prog pin capacitance, capacitance on this pin must be kept to a minimum. with no additional capacitance on the prog pin, the charger is stable with program resistor values as high as 25k. however, additional capacitance on this node reduces the maximum allowed program resistor. the pole frequency at the prog pin should be kept above 100khz. therefore, if the prog pin has a parasitic capacitance, c prog , the fol- lowing equation should be used to calculate the maximum resistance value for r prog : r khz c prog prog 1 2 100 ?? applicatio s i for atio wu u u
LTC4098 29 4098f typical applicatio s u high ef? ciency usb/automotive battery charger with overvoltage protection, reverse-voltage protection and low battery start-up v bus v c wall acpr automotive, firewire, etc. usb to uc to uc system load m5 c2 10 m f 0805 c1 4.7 m f c7 68nf c5 10 m f 0805 c4 22 m f c6 0.47f c3 0.1 m f 0603 r4 100k r9 499k r11 150k 4 2 3 7 3 7 9, 21 6 9 20 18 19 14 12 10 11 11 1 6 8 5 10 13 d2 d1 d3 m3 r6 3.01k r7 1k r2 m4 l1 3.3 m h l2 10 m h 4098 ta02 clprog prog LTC4098 lt3480 gnd sw batsens ovgate ovsens d0-d2 chrg ntcbias ntc 2 1 15-17 8 4 5 v out idgate bat li-ion + r5 100k t r1 m1 m2 m1, m2, m4, m5: vishay-siliconix si2333ds m3: vishay-siliconix si2306bds r5: vishay-dale nths0603n011-n1003f r10 40.2k r8 100k r3 6.04k rt v in run/ss pg gnd v c bd sync sw fb boost 3 v bus ovgate wall acpr 5v wall adapter usb to uc to uc system load m6 c2 10 m f 0805 c1 10 m f 0805 c4 10 m f 0805 c3 0.1 m f 0603 r4 100k 3 7 9, 21 6 2181914 12 10 11 13 d4 d3 d2 d1 r6 3.01k r7 1k r2 m5 l1 3.3 m h 4098 ta03 clprog prog LTC4098 gnd sw batsens ovsense d0-d2 chrg ntcbias ntc 1 15-17 8 4 5 v out idgate bat li-ion + m3 m4 r5 100k t r1 m1 m2 r3 6.04k m1, m2, m5, m6: vishay-siliconix si2333ds m3, m4: vishay-siliconix si2306bds r5: vishay-dale nths0603n011-n1003f 3 usb/wall adapter battery charger with dual overvoltage protection, reverse-voltage protection and low battery start-up
LTC4098 30 4098f typical applicatio s u usb/automotive switching battery charger with automatic current limiting on both inputs low cost usb and automotive high ef? ciency power manager with low battery start-up v bus v c wall acpr automotive, firewire, etc. usb wall adapter to uc to uc system load c2 10 m f 0805 c5 10 m f 0805 c1 4.7 m f c7 68nf c4 22 m f c6 0.47f c3 0.1 m f 0603 r2 100k r6 499k r8 150k 4 2 3 7 3 7 9, 21 6 9 20 18 19 14 12 10 11 11 1 6 8 5 10 13 m1 r4 3.01k r5 1k m2 d1 l1 3.3 m h l2 10 m h 4098 ta04 clprog prog LTC4098 lt3480 gnd sw batsens ovgate ovsens d0-d2 chrg ntcbias ntc 2 1 15-17 8 4 5 v out idgate bat li-ion + r3 100k t r9 40.2k r7 100k r1 6.04k rt v in run/ss pg gnd v c bd sync sw fb boost m1: vishay-siliconix si2306bds m2: vishay-siliconix si2333ds r3: vishay-dale nths0603n011-n1003f 3 v bus v c wall acpr automotive, firewire, etc. usb wall adapter to uc to uc system load m2 c1 4.7 m f c7 68nf c5 10 m f 0805 c4 22 m f c6 0.47f c3 0.1 m f 0603 r4 499k r1 150k 4 2 3 7 3 7 9, 21 6 9 20 18 19 14 12 10 11 11 1 6 8 5 10 13 r3 3.01k r5 1k m1 d1 l1 3.3 m h l2 10 m h 4098 ta05 clprog prog LTC4098 lt3480 gnd sw batsens d0-d2 chrg ntcbias ntc 2 1 15-17 8 4 5 v out idgate bat li-ion + r2 40.2k r5 100k rt v in run/ss pg gnd v c bd sync sw fb boost c2 10 m f 0805 ovgate ovsens m1, m2: vishay-siliconix si2333ds 3
LTC4098 31 4098f package descriptio u information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. pdc package 20-lead plastic utqfn (3mm 4mm) (reference ltc dwg # 05-08-1752 rev ?) 3.00 p 0.10 1.50 ref 4.00 p 0.10 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 p 0.10 19 20 1 2 bottom viewexposed pad 2.50 ref 0.55 p 0.05 r = 0.115 typ pin 1 notch r = 0.20 or 0.25 s 45 o chamfer 0.25 p 0.05 0.50 bsc 0.127 ref 0.00 C 0.05 (pdc20) utqfn 0407 rev ? recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 0.70 p 0.05 0.25 p 0.05 2.50 ref 3.10 p 0.05 4.50 p 0.05 1.50 ref 2.10 p 0.05 3.50 p 0.05 package outline r = 0.05 typ 1.65 p 0.10 2.65 p 0.10 1.65 p 0.05 0.50 bsc 2.65 p 0.05
LTC4098 32 4098f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 1207 ? printed in usa related parts part number description comments battery chargers ltc4057 lithium-ion linear battery charger up to 800ma charge current, thermal regulation, thinsot tm package ltc4058 standalone 950ma lithium-ion charger in dfn c/10 charge termination, battery kelvin sensing, 7% charge accuracy ltc4065/ltc4065a 750ma linear lithium-ion battery charger 2mm 2mm dfn package, thermal regulation, standalone operation ltc4411/ltc4412 low loss single powerpath controllers in thinsot automatic switching between dc sources, load sharing, replaces oring diodes ltc4413 dual ideal diodes 3mm 3mm dfn package, low loss replacement for oring diodes power management ltc3406/ltc3406a 600ma (i out ), 1.5mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in = 2.5v to 5.5v, v out = 0.6v, i q = 20a, i sd < 1a, thinsot package ltc3411 1.25a (i out ), 4mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in = 2.5v to 5.5v, v out = 0.8v, i q = 60a, i sd < 1a, ms10 package ltc3555/ltc3555-1 i 2 c controlled switching usb power manager with li-ion/polymer charger, triple synchronous buck converter plus ldo complete multi-function pmic: switchmode power manager and three buck regulators plus ldo charge current programmable up to 1.5a from wall adapter input, thermal regulation synchronous buck converters ef? ciency: >95%, adj outputs: 0.8v to 3.6v at 400ma/ 400ma/1a bat-track adaptive output control, 200m ideal diode, 4mm 5mm qfn-28 package ltc3557/ltc3557-1 usb power manager with li-ion/polymer charger, tripple synchronous buck converter plus ldo complete multi-function pmic: linear power manager and three buck regulators charge current programmable up to 1.5a from wall adapter input, thermal regulation synchronous buck converters ef? ciency: >95%, adj outputs: 0.8v to 3.6v at 400ma/400ma/600ma bat-track adaptive output control, 200m ideal diode, 4.1v float voltage (ltc3557-1) 4mm 5mm qfn-28 package ltc4055 usb power controller and battery charger charges single cell li-ion batteries directly from a usb port, thermal regulation, 200m ideal diode, 4mm 4mm qfn16 package ltc4066 usb power controller and battery charger charges single cell li-ion batteries directly from a usb port, thermal regulation, 50m ideal diode, 4mm 4mm qfn24 package ltc4085/ ltc4085-1 usb power manager with ideal diode controller and li-ion charger charges single cell li-ion batteries directly from a usb port, thermal regulation, 200m ideal diode with <50m option, 4.1v float voltage (ltc4085-1) 4mm 3mm dfn14 package ltc4088 high ef? ciency usb power manager and battery charger maximizes available power from usb port, bat-track, instant-on operation, 1.5a max charge current, 180m ideal diode with <50m option, 3.3v/25ma always-on ldo, 4mm 3mm dfn14 package ltc4088-1/ ltc4088-2 high ef? ciency usb power manager and battery charger with regulated output voltage maximizes available power from usb port, bat-track, instant-on operation, 1.5a max charge current, 180m ideal diode with <50m option, automatic charge current reduction maintains 3.6v minimum v out , no 3.3v ldo, 4mm 3mm dfn14 package ltc4089/ ltc4089-5/ ltc4089-1 usb power manager with ideal diode controller and high ef? ciency li-ion battery charger high ef? ciency 1.2a charger from 6v to 36v (40v max) input. charges single cell li-ion/polymer batteries directly from a usb port, thermal regulation, 200m ideal diode with <50m option, 6mm 3mm dfn22 package. bat-track adaptive output control (ltc4089), fixed 5v output (ltc4089-5), 4.1v float voltage (ltc4089-1) ltc4090 high voltage usb power manager with ideal diode controller and high ef? ciency li-ion battery charger high ef? ciency 1.2a charger from 6v to 38v (60v max) input. charges single cell li-ion/polymer batteries directly from a usb port, thermal regulation, 200m ideal diode with <50m option, 6mm 3mm dfn22 package. bat-track adaptive output control thinsot is a trademark of linear technology corporation.

▲Up To Search▲

Price & Availability of LTC4098

	To Download LTC4098 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .